1. Field of the Invention
The present invention relates to a capacitor, and more particularly to a metal-insulator-metal (MIM) capacitor capable of improving leakage current and breakdown voltage characteristics, and a method for fabricating the same.
2. Description of the Prior Art
In semiconductor integrated circuits (ICs), a semiconductor capacitor may be implemented to provide a capacitive component within the design of a semiconductor integrated device. The applications for these capacitors can include mixed signal (analog/digital) devices, RF (radio frequency) devices, and even decoupling capacitors for the filtering of high frequency signals and improved noise immunization.
One type of semiconductor capacitor structure, called the MIM capacitor, is commonly used in silicon-based processes for its versatility and consistency in reproduction in semiconductor processing. Please refer to FIG. 1. FIG. 1 is a schematic view of forming a capacitor 12 on a semiconductor wafer 10 according to the prior art. As shown in FIG. 1, the semiconductor wafer 10 is provided first. A bottom electrode 14, which is composed of an aluminum (Al) layer 22 on the substrate 11, a titanium (Ti) layer 24 on the aluminum layer 22, and a titanium nitride (TiN) layer 26, is evenly formed. A silicon nitride film and another metal layer are then respectively deposited on the surface of the bottom electrode 14. A lithographic process is performed to define the patterns of a top electrode 18, and excess portions of metal layer and the silicon nitride film are removed to form a dielectric layer 16 and the top electrode 18 so as to finish the formation of the capacitor 12. Generally speaking, the thickness of the prior art aluminum layer 22 is about 350 angstroms, the thickness of the titanium layer 24 is about 50 angstroms, the thickness of the bottom electrode 14 is about 500 angstroms, the thickness of the dielectric layer 16 is about 380 angstroms, and the thickness of the top electrode 18 is about 600 angstroms.
The dielectric layer 16 is formed by means of a prior art CVD process, where an atomic percentage of silicon-hydrogen bonds in the silicon nitride film 16 is about 16.23%, and an atomic percentage of nitride-hydrogen bonds in the silicon nitride film 16 is about 10.98%. Accordingly, the ratio of silicon-hydrogen bonds to nitride-hydrogen bonds is nearly 1.478, and the compressive stress of the silicon nitride film 16 is nearly 2.3 Giga pascals (Gpa).
The capacitance of a capacitor 12 is directly proportional to the dielectric constant of the dielectric layer 16, proportional to the overlapping area of the bottom electrode 14 and the top electrode 18, and inversely proportional to the thickness of the dielectric layer 16. Accordingly, with regard to recent highly integrated devices, dielectric materials with a high dielectric constant have been employed, or the dielectric layer 16 has been deposited to be as thin as possible.
Thus, the capacitance of the capacitor 12 is increased by means of reducing the thickness of the dielectric layer 16. However, in the case of decreasing the thickness of the dielectric layer 16 to increase the capacitance for a capacitor 12, several problems may occur. For example, the leakage current may increase and the breakdown voltage problem deteriorates.
As a result, at the present stage of decreasing the thickness of the dielectric layer 16, a decrease of reliability and production yield is also caused. The performance of the circuit using the capacitor structure 12 will be degraded, and it is difficult to apply the capacitor structure 12 in the semiconductor device.
Accordingly, a dielectric layer having an oxide-nitride-oxide (ONO) structure is applied in the capacitor 12 instead of the silicon nitride dielectric layer 16. Please refer to FIG. 2. FIG. 2 is a schematic view of forming a traditional capacitor 32 on a semiconductor wafer 30. As shown in FIG. 2, the semiconductor wafer 30 includes a substrate 31, and a bottom electrode 34 positioned on the surface of the substrate 31. Subsequently, an oxide film 36a on the surface of the bottom electrode 34, a silicon nitride film 36b on the oxide film 36a, another oxide film 36c on the silicon nitride film 36b, and another metal layer on the silicon nitride film 36b are respectively deposited. The thickness of the oxide film 36a and of the oxide film 36c is about 100 angstroms, and the thickness of the silicon nitride film 36b is about 130 angstroms. A lithographic process is thereafter performed to remove excess portions of the metal layer, the silicon nitride film 36b and the oxide film 36a, 36c, and the top electrode 38 and a dielectric layer 36 are formed to finish the formation of the capacitor 32. The thickness of the bottom electrode 34 is about 500 angstroms, and the thickness of the top electrode 38 is about 600 angstroms.
The dielectric layer 36 is formed by means of traditional CVD processes, where an atomic percentage of silicon-hydrogen bonds in the silicon nitride film 36a is about 21.69%, and an atomic percentage of nitride-hydrogen bonds in the silicon nitride film 36a is about 9.65%. Accordingly, the ratio of silicon-hydrogen bonds to nitride-hydrogen bonds is nearly 2.248, and the tensile stress of the silicon nitride film 36a is nearly 1.93 Gpa.
The dielectric layer 36 having the ONO structure can increase the breakdown voltage. Nevertheless, the improvement of the ONO structure is limited, and the breakdown voltage issue still restricts the performance of the capacitor 32.